IBM and GlobalFoundries go Gate-Last for 20nm

January 20, 2011 // 11:24 a.m.

Tags: #20nm #2220nm #22nm #amd #cpu #cpu-fabrication #fab #foundries #gate-first #gate-last #global #globalfoundries #ibm #node #processor

Despite their previous insistence that gate-first was the correct approach to manufacturing future CPUs - including upcoming 32nm/28nm models - GlobalFoundries and IBM have now changed their minds, announcing a gate-last strategy for the fabrication of their 20nm and 22nm chips.

The two major chip fabs follow behind Intel and TSMC, who have already committed to a gate-last approach for their advanced nodes. In fact, Intel has even championed the use of the gate-last technique for its entire high-k metal gate line-up since the introduction of its 45nm CPUs.

In case you're unfamiliar with the latest CPU manufacturing jargon, gate-last and gate-first refer to the point at which a transistor's gate is put onto a CPU-production wafer. Previously, CPU transistors featured a silicon gate and a silicon dioxide insulator.

However, in order to combat the problems with current leakage as silicon gets thinner, most fabrication firms have now been replaced the silicon-based parts with a metal gate and a high-k insulator made from a material such as Hafnium. This means that a fabrication company has to choose whether the metal gate electrode is dropped onto the wafer before or after the high-temperature heating process.

We questioned GlobalFoundries about this matter ourselves when we previously met the company late last year. However, an equally sceptical CPU guru, David Kanter of Real World Technologies, has now confirmed that the two companies announced the change in strategy during the recent Common Platform tech day, stating:

'The Common Platform members (mostly GF and IBM) had maintained that gate first had density advantages which overshadow the defectivity and performance benefits of gate last.

This always rung a bit hollow to me and did not seem very plausible. The two highest volume logic manufacturers (TSMC and Intel) clearly opted for gate last, which is a pretty strong signal. There were also rumors of Samsung and others pressuring IBM to move to gate last...so the writing has been on the wall for some time.'


Also, perhaps more worryingly, Kanter goes on to comment about the current state of the 32nm node that continues to use the gate-first technique:

'The 32nm ramp has not been going particularly well, and is further behind Intel than usual. There were whispers that this was at least in part due to the choice of a gate first process flow. In theory, removing the challenges associated with gate first should result in a faster and smoother ramp for IBM, GF, etc. and benefit AMD in terms of time to market for 20nm'.

Kanter also goes on to say that gate-last is superior, because it provides a better choice of transistors for higher performance, which could crudely translated into better overclocking potential, as well as lower leakage. We've yet to see how any GlobalFoundries 32nm device performs, as the company previously admitted that AMD's Llano is 'driving yield learning,' so we'll have to wait and see how it all works out in this year's Fusion parts.

Will Intel stretch its lead even further? Will AMD's Llano and Bulldozer CPUs suffer this year? Let us know your thoughts in the forums.

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