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Intel unveils Xeon Phi MIC hardware

Intel unveils Xeon Phi MIC hardware

Intel's Knights Corner MIC hardware, an accelerator board for highly-parallel processing tasks, is finally coming to market as the Xeon Phi.

Intel has announced that it is to begin commercial shipments of its Knights Corner Many Integrated Core (MIC) architecture hardware under the brand name Xeon Phi.

Born out of the Larrabee graphics project, Knights Corner and Knights Ferry are codenames for add-in PCI Express accelerator boards which add fifty high-performance massively-parallel processing cores plus up to 8GB of GDDR5 memory to a computer system. If that sounds familiar, it's because what Intel has basically created is a graphics card minus the graphics - the equivalent to Nvidia's GPGPU-targeted Tesla product line.

Although Intel has been providing Knights Ferry and Knights Corner hardware, under its Many Integrated Cores (MIC) project, to supercomputing companies and research establishments, it has yet to launch a commercial version. Its announcement at the International Supercomputing Conference yesterday changes that - and upgrades the specification of the hardware into the bargain.

While previous Knights Corner boards, including one shown off by the company back at the International Supercomputing Conference 2011, packed fifty processing cores and 4GB of GDDR5 memory, the Xeon Phi will include more than 50 cores - although Intel isn't saying just how many more - and 8GB or more of GDDR5 RAM.

Running double-precision floating point mathematics, the Xeon Phi is claimed to be capable of one teraflop - a trillion operations per second. By contrast, Nvidia's M2090 Tesla board manages just 665 gigaflops in double-precision mode.

The re-purposed Larrabee hardware is all part of Intel's 'exascale' vision - increasing the efficiency and performance of computing hardware beyond today's gigaflop and teraflop levels to petaflop and exaflop levels - one quintillion operations per second.

Intel's continued investment in the long-deceased Larrabee project as it exists in the MIC architecture opens an interesting possibility for the consumer market, too: although current MIC hardware is targeted firmly at supercomputing and high-performance computing (HPC) markets and comes with a price-tag to match, it gives Intel the potential to one day take a cut-down MIC board and release it as a discrete graphics card by adding a few additional components.

Speaking at the International Supercomputing Conference last year Intel's director of technical compute marketing John Hengeveld refused to deny any such plans, stating simply that 'Larrabee and MIC are aimed at different markets - we tried to take the best out of what we learned [from Larrabee] and bring it to MIC.' Hengeveld would go on to clarify that 'there are challenges moving from one to the other - and Intel may or may not want to take those challenges,' leaving the door open for a rebirth of Larrabee in the future.

13 Comments

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Paradigm Shifter 19th June 2012, 11:31 Quote
They may have ended up aiming at core count being a power of two. Until they say precisely, though, it's all guesswork.

I'm actually really curious about this; much is going to depend on performance per Watt, as even the HPC sector is getting energy conscious.
LordLuciendar 19th June 2012, 13:54 Quote
Not that these boards will ever be affordable by common man... but how long until a company like Lucid writes an app that siphons the massive computing power of these boards through onboard graphics?

There is just no arguing, twice the computing power has got to produce something good in the world of rendering.
damien c 19th June 2012, 15:01 Quote
I saw somewhere but cannot remember where, but it said these thing's had around 100 cores based on the old Pentium 4.

I wonder if these would be able to be used for F@H giving you a massive increase in PPD possibly.
Gareth Halfacree 19th June 2012, 15:24 Quote
Quote:
Originally Posted by damien c
I saw somewhere but cannot remember where, but it said these thing's had around 100 cores based on the old Pentium 4.
Wherever you read it, it was wrong: they're fifty-some core cards, and have nothing to do with the old Pentium 4 architecture whatsoever.
Quote:
Originally Posted by damien c
I wonder if these would be able to be used for F@H giving you a massive increase in PPD possibly.
That's exactly the kind of task Intel is aiming the Xeon Phi at: massively parallel processing in supercomputing and HPC. You *could* get a massive increase in PPD, but the boards are going to be seriously expensive and you'd need to modify the F@H code to specifically use the MIC architecture. Not that that's a real problem: when I spoke to Intel about MIC (based on what was then called Knights Ferry) at ISC last year, Kirk Skaugen claimed it had taken the university of forgottenwhere a week to modify their software to be MIC-ready.
schmidtbag 19th June 2012, 15:38 Quote
i'm still unclear about these - is this actually a gpgpu like tesla or is it actually additional cpu cores? also, i feel like something like this would likely be faster than the main CPU of the system and therefore find it hard to believe that it can perform to its maximum potential from a pci-e slot. also, it is atom based again or xeon this time?
Gareth Halfacree 19th June 2012, 15:43 Quote
Quote:
Originally Posted by schmidtbag
i'm still unclear about these - is this actually a gpgpu like tesla or is it actually additional cpu cores?
Six of one, half a dozen of the other. The cores have more in common with a GPU than a CPU - they're based on the Larrabee architecture - but there's no graphics handling capabilities. They're designed for massively-parallel processing and floating-point performance, but they don't show up as CPUs to the system - you can't run your OS on them.
Quote:
Originally Posted by schmidtbag
also, i feel like something like this would likely be faster than the main CPU of the system and therefore find it hard to believe that it can perform to its maximum potential from a pci-e slot.
Remember it's got a chunk (8GB or more) of its own RAM, and Intel's making noises about InfiniBand backplanes (something Knights Ferry and Corner, which were PCIe exclusively, didn't feature.) Remember too that a GPU is technically 'faster' than the main CPU of a system at certain tasks - otherwise we wouldn't have GPUs...
Quote:
Originally Posted by schmidtbag
also, it is atom based again or xeon this time?
Neither, it's MIC.
noizdaemon666 19th June 2012, 15:55 Quote
Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
Gareth Halfacree 19th June 2012, 16:00 Quote
Quote:
Originally Posted by noizdaemon666
Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.
noizdaemon666 19th June 2012, 16:21 Quote
Quote:
Originally Posted by Gareth Halfacree
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.


Ahh, thanks for that ;) On the f@h front, you're not allowed to alter any of the code within the client, only the Stanford team are allowed. But if someone persuaded them to do it, and some other nice people with lots of money bought a couple of these, the output would be phenominal.
debs3759 19th June 2012, 17:10 Quote
I have a couple of these on my future shopping list, for folding with (but not before Stanford update their code to support it). Should be a lot of ppd with these cards :)
Alecto 19th June 2012, 22:43 Quote
Quote:
Originally Posted by Gareth Halfacree
Quote:
Originally Posted by noizdaemon666
Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.

How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores s'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?
Alecto 19th June 2012, 22:44 Quote
Quote:
Originally Posted by Alecto
Quote:
Originally Posted by Gareth Halfacree
Quote:
Originally Posted by noizdaemon666
Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.

How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores 'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on another kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?
noizdaemon666 20th June 2012, 04:34 Quote
Quote:
Originally Posted by Alecto
How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores s'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?

Because, as Gareth pointed out, most of the instruction set is the same only requiring relatively minor tweaks to make it work. Building from the ground up would take so much longer and loads more man hours to get anything to work with it. There's a reason x86 is still the predominant instruction set.
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