Intel is looking into the world of the massively parallel with the announcement of a 48-core single-chip processor.
As reported by CNET's Deep Tech blog, the chip giant went public yesterday with a 48-core, 1.3 billion transistor processor it calls the Single-Chip Cloud Computer - a product of the company's Tera-Scale Research Project, and a more modern successor to the 80-core Polaris chip the project created a few years ago.
Interestingly, although the main bulk of Intel's planned marketing strategy is right there in the name - cloud computing being the hot topic of the moment, and something which demands an awful lot of individually accessible processing cores at the server end in order to do well - Intel's Chief Technology Officer, Justin Rattner, envisioned a future where a SCC-powered machine would be "capable of understanding the world around them as much as humans do. They will see and hear and probably speak and do a number of other things that resemble human-like capabilities."
The prototype processor contains 24 tiles with two addressable Intel Architecture cores per tile, connected via a mesh network offering 256GB/s bisection bandwidth. Memory access is governed by four on-chip DDR3 memory controllers, and a message buffer is included in each tile for efficient message passing.
The company has obviously thought about power usage with so many cores - albeit underpowered compared to the company's existing range of dual- and quad-core server processors - and has developed the technology for the clock speed of each dual-core tile to run at a frequency independent of any other tile, and groupings of four tiles able to run at a voltage independent of any other group. This allows the entire 48-core chip to be run at power draws of between 25W at idle and 125W under full load.
If you think the tiled design seems strangely familiar, you're right: last month, high-performance computing specialist Tilera announced its own tile-based processor which featured an impressive 100 cores, again with individually addressable power requirements.
Intel fellow Jim Held stated in a blog post that "SCC is an ideal test-bed to explore parallel programming approaches for the mainstream as well as how the Cloud computing performance could be improved with an on-die architecture that reflects the larger Cloud," and revealed successful tests "with Linux on each core, running an application using Hadoop."
If you'd like to see the announcement in full, Intel has kindly provided a video.
Do you believe that the future of the server is in many, slower cores - or will the world always need powerhouse chips? Share your thoughts over in the forums.
As reported by CNET's Deep Tech blog, the chip giant went public yesterday with a 48-core, 1.3 billion transistor processor it calls the Single-Chip Cloud Computer - a product of the company's Tera-Scale Research Project, and a more modern successor to the 80-core Polaris chip the project created a few years ago.
Interestingly, although the main bulk of Intel's planned marketing strategy is right there in the name - cloud computing being the hot topic of the moment, and something which demands an awful lot of individually accessible processing cores at the server end in order to do well - Intel's Chief Technology Officer, Justin Rattner, envisioned a future where a SCC-powered machine would be "capable of understanding the world around them as much as humans do. They will see and hear and probably speak and do a number of other things that resemble human-like capabilities."
The prototype processor contains 24 tiles with two addressable Intel Architecture cores per tile, connected via a mesh network offering 256GB/s bisection bandwidth. Memory access is governed by four on-chip DDR3 memory controllers, and a message buffer is included in each tile for efficient message passing.
The company has obviously thought about power usage with so many cores - albeit underpowered compared to the company's existing range of dual- and quad-core server processors - and has developed the technology for the clock speed of each dual-core tile to run at a frequency independent of any other tile, and groupings of four tiles able to run at a voltage independent of any other group. This allows the entire 48-core chip to be run at power draws of between 25W at idle and 125W under full load.
If you think the tiled design seems strangely familiar, you're right: last month, high-performance computing specialist Tilera announced its own tile-based processor which featured an impressive 100 cores, again with individually addressable power requirements.
Intel fellow Jim Held stated in a blog post that "SCC is an ideal test-bed to explore parallel programming approaches for the mainstream as well as how the Cloud computing performance could be improved with an on-die architecture that reflects the larger Cloud," and revealed successful tests "with Linux on each core, running an application using Hadoop."
If you'd like to see the announcement in full, Intel has kindly provided a video.
Do you believe that the future of the server is in many, slower cores - or will the world always need powerhouse chips? Share your thoughts over in the forums.
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