Nvidia CEO reveals Fermi architecture

Written by Tim Smalley

September 30, 2009 // 10:26 p.m.

Tags: #architecture #fermi #gpu #gtc #gtc2009 #nvidia

Nvidia's CEO and President Jen-Hsun Huang has revealed Nvidia's next-generation GPU architecture, which goes by the codename Fermi.

It represents the first major architectural change since the company announced its G80 graphics processor in 2006.

Fermi packs three billion (yes, you read that right) transistors and features 512 CUDA cores with suppor for IEEE 754-2008 floating point precision. It has native support for C++, which complements existing support for C, Fortran, Java, Python, OpenCL and DirectCompute.

There's also a new cache hierarchy, known as Nvidia Parallel DataCache, and an updated Nvidia GigaThread Engine with support for concurrent kernel execution. Nvidia has also introduced Nexus, which it claims is the world's first integrated heterogeneous computing application development environment within Microsoft Visual Studio.

High performance computing users haven't been left out dry either, as double precision throughput has increased by a factor of eight compared to the previous generation. Nvidia has also added support for ECC memory, which is a critical requirement for datacentres and supercomputers looking to deploy GPUs on a large scale.

There's quite a lot to take in here, and we've not got the full details yet - we'll be doing a much fuller analysis as soon as we know more. One key thing to consider is graphics performance, but we're quite confident here as Huang said that "we will make real-time ray tracing a reality this year."

We have to wonder where some of these changes leave AMD in the compute space because, as we mentioned in our Radeon HD 5870 Architecture Analysis, AMD's GPU computing strategy isn't as strong as it could be compared to Nvidia's (before Fermi) and now the holes become more apparent.

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