AMD's Ryzen hit by FMA3 hard-crash erratum

March 16, 2017 | 10:11

Tags: #bug #crash #erratum #fma3 #freeze #halt-and-catch-fire #instruction #naples #ryzen #zen

Companies: #amd #haswell #hwbot

A little-known benchmark tool has winkled out a bug in the microcode of AMD Ryzen processors which allows programs using a 128-bit Fused Multiply Add 3 (FMA3) instruction to hard-crash the host system - but a fix is reportedly on the way.

The flaw in AMD's Ryzen parts was first spotted last week by HWBOT user Mysticial, who posted a forum thread detailing a strange experience with the open-source Flops benchmarking tool. Using a version of the tool designed for Intel's Haswell processors, Mysticial was able to hard-freeze his system every time Flops ran a single-precision 128-bit Fused Multiple Add 3 (FMA3) instruction - requiring a complete power off and on in order to restore functionality. As others tested the tool, it became clear that the crash wasn't restricted to Mysticial's build nor the Asus motherboard but was entirely reproducible on any Ryzen system.

Following community confirmations of the bug, HWBOT's chief operating officer Pieter-Jan Plaisier posted that he had received confirmation that the crash was the result of a flaw in AMD's Ryzen microcode - meaning it affects all currently-available Ryzen chips, and likely also the company's upcoming Naples server parts which share the same Zen microarchitecture. Thankfully, a fix is on the way: 'Was told this issue will be fixed in a new AGESA [AMD Generic Encapsulated Software Architecture microcode] code,' Plaisier claimed. 'In other words: it was an AMD [CPU] issue, not C6H [chipset] issue.'

The particular instruction which crashes the Flops benchmark is not in common usage in commercial software, but the presence of a hard-freeze bug is nevertheless a problem: a malicious application could crash any Ryzen- and likely any Zen-based system with a single line of code. For now, disabling Simultaneous Multi-Threading (SMT) - which allows Ryzen to run two threads on each processor core - appears to reduce the likelihood of a freeze.

AMD has not publicly commented on the issue, nor offered a timescale for the release of an AGESA update to address the problem.
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