Computer Memory Hierarchy
Different types of memory perform and serve different purposes in the overall scheme of computer engineering. They are classified based on their purpose, speed, complexities and cost of manufacturing.
Generally, faster memory costs more to design and manufacture. As a result, their capacity is usually more limited. It is also true the other way around, slower memory and storage system almost always have more capacity.
Computer Memory Hierarchy is a pyramid structure that is commonly used to illustrate the significant differences among memory types. This diagram and variations of it can be found on various reference websites on the Internet such as Wikipedia.
The version of Computer Memory Hierarchy illustrated here represents different levels of performance among various memory technologies that can be found in standard desktop computers.
The DDR Memory Family
Double-Data Rate (DDR) is an evolutionary progress from SD-RAM (SDR) technology, which was first introduced in 1993. As that technology reaches its limit in 1999, DDR technology was engineered as the solution for the subsequent decade.
There are two ways to describe DDR memory specifications. One denotes the actual DRAM chip specification; the other is used to describe the memory module specification. They are sometimes used interchangeably, but as we progress along you will discover that not all memories are created equal or appear as them seemed.
Main Differences between DDR generations
There are fundamental differences between each generation of DDR beyond physical distinctions. Each progression of technology tries to solve problems or side-effects associated with faster performance such as signal noise, skewing, jitters, timing inaccuracy, interference and so forth.
It was not because these problems did not exist in previous generations, but the fact that they were often insignificant at slower speed. At higher speeds, new techniques are required to mitigate higher level of signal uncertainties. Faster performance requires much tighter tolerance.
A clock cycle is how long it takes the wave from the peak to reach the bottom, shown here as a Sine wave, but do note that the actual shape of the signal is more in between that of square and Sine. The ability to send 2 signals in a clock cycle is achieved by attaching the data on the rise and fall of the wave. This is the key to DDR technology.