First Look: VIA K8T900

Written by Tim Smalley

November 22, 2005 | 10:00

Tags: #benchmark #chipset #crossfire #heatsink #motherboard #nforce-4 #nvidia-nforce4 #pci-express #performance #preview #review #sli

Companies: #ati

First Look: VIA K8T900 K8T900 Reference Board
The components on the board are generally well placed, apart from the power connections on the board. We feel that they could be better placed closer to the edge of the board near the memory slots. We are also slightly concerned about the row of capacitors in between the six-phase power system and the heatsink retention module. However, we expect these minor niggles to be fixed when retail motherboards from VIA's partners are finalised.

The one thing that really impresses us about VIA's K8T900 reference motherboard is the sheer lack of cooling required by the K8T900 North Bridge. The heatsink a passive solution made from aluminium; it's marginally taller than the heatsink retention module, and there really isn't a great deal to it. However, we did some touch testing during a heavy gaming session when using the board and found it to be warm to the touch, but certainly not on fire by any means. The South Bridge, on the other hand, doesn't require a heatsink, meaning that there is no fan noise coming directly from the board. This is in contrast to nForce4 SLI boards, which feature active cooling via those whiney 40mm chipset fans that are such a nightmare for anyone wanting a silent system.

First Look: VIA K8T900 K8T900 Reference Board First Look: VIA K8T900 K8T900 Reference Board
The memory slots are coloured by channel, and the board is capable of supporting up to 4GB of DDR memory. Moving past the memory slots, there are the two ATA133 ports, and the four SATA II ports are directly to the left of them above the BIOS battery. There are red and green power/reset buttons like we've seen before on the DFI LANParty series motherboards - we hope to see this useful little feature implemented by more motherboard manufacturers too.

The CMOS clear jumper is directly below the BIOS chip, whilst there is an additional USB 2.0 header along the bottom edge of the board. The chip directly below the two PCI expansion slots is the VT6307 IEEE 1394 Firewire port - the header for this is the white 9-pin header directly below the floppy disk drive connector.

First Look: VIA K8T900 K8T900 Reference Board First Look: VIA K8T900 K8T900 Reference Board
The reference board also features 802.11g Wireless Ethernet via the VT6656 and Ubec UW2452 chips located above the two PCI-Express x16 interconnects. In between the two x16 interconnects, there is the PCI-Express mode paddle that configures the lane configuration across the two PCI-Express x16 slots. When the paddle is flipped over, the lanes are configured in a x8 - x8 configuration for MultiChrome mode. Finally, the board features the Realtek ALC880 High Definition Audio codec with an 8-channel output on the back panel. Next to that, there are four USB 2.0 ports and the 10/100/1000 Ethernet port, which is powered by the Marvell 88E8053-NNC network controller. Interestingly, the chipset's inbuilt Ethernet controller is not used on this reference board.

MultiChrome and S27 Chrome:

MultiChrome is where two S27 Chrome video cards are installed to work together in tandem to increase the in-game performance. VIA and S3 Graphics provided us with some numbers - performance increases ranged from 88%, right the way down to 13%, depending on the title.

There are two rendering modes used by MultiChrome: Split Frame Rendering and Alternate Frame Rendering - they're familiar and used by both ATI and NVIDIA in their own Multi-GPU implementations. The mode used is dependant on the title, which is controlled inside the drivers. There are also no cables and no connectors required to enable MultiChrome. All that is needed is two S27 Chrome video cards and the MultiChrome driver.

S27 Chrome is based on a Shader Model 2.0+ architecture, featuring four 32-bit floating point vertex shaders. They're arranged in a four-wide SIMD (single instruction, multiple data) configuration, allowing four vertex instructions per clock, per shader (making a total of sixteen per clock). The pixel shader arrangement is based on two quads of four-wide SIMD capable of four 24-bit floating point components per clock, per pipeline, meaning a total of 32 operations per clock in the pixel shader. We also understand that the architecture is capable of blending a single texture to four pixels every clock cycle.

The core is clocked at 700MHz, meaning it is capable of filling 5600 MPixels/sec. On the other hand, the memory is clocked at an equally impressive 1400MHz DDR with a 128-bit memory interface that is capable of supporting up to 256MB of DDR, DDR2 or GDDR3 delivering just over 22GB/sec of memory bandwidth.
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