After yesterday's discussions with NVIDIA's Chief Scientist, David Kirk, we managed to get a bit more information from the other side of the fence regarding G70's unknown number of clock speeds
In a statement on Beyond 3D forums
, Unwinder, the name behind RivaTuner, aired some scepticism surrounding Kirk's response to our understanding that there were only
three clock domains inside G70. Kirk formulated a cryptic reply stating that we were making the assumption that there were only three clocks across the 300-million transistor GPU.
Unwinder went on to explain that the video BIOS is the simplest way to verify the number of programmable clock domains inside a GPU. He went on to explain how there is a PLL (phase-locked loop) programming routine that needs to switch all clock domains.
This is to prevent unwanted clock speed jumps, as the post divider and reference feedback divider are located in different registers, making it impossible to program the whole PLL in a single step.
We will keep you up to date on this hot topic as things progress - look out for our David Kirk interview in the next few days. Let us know your thoughts