Toshiba, Western Digital announce 96-layer BiCS4 flash

June 29, 2017 // 6 a.m.

Tags: #bics #bics-2 #bics-3 #bics4 #bics-4 #flash #nand-flash #qlc #solid-state #solid-state-storage #ssd #tlc #toshiba #toshiba-memory-corporation #western-digital

Toshiba and Western Digital have both announced the development of 96-layer 3D-stacked flash memory modules, even as their joint venture together comes under threat following legal action between the two.

Toshiba and Western Digital have been in the headlines for all the wrong reasons of late, following Toshiba's announcement that it would be spinning off its semiconductor division, minus the image sensor parts, into a separate company dubbed Toshiba Memory Corporation (TMC) and selling a chunk off to raise funds designed to cover losses made in the US nuclear power market. Western Digital was considered a front-runner for the deal, but as other bidders emerged the company warned it would seek to block any sale to a third party using what it claims to be rights granted to its SanDisk subsidiary under a flash memory joint venture with Toshiba. Sure enough, when the winner was announced Western Digital began legal proceedings against Toshiba, which Toshiba then countered with legal proceedings of its own.

Despite this - and claims from Western Digital that Toshiba has acted to 'prohibit certain employees from accessing shared databases and, in some instances, the JV's [Joint Venture's] facilities themselves,' - the pair still have products to sell, and have separately announced new flash memory modules developed at the Toshiba-SanDisk joint venture.

The new modules, dubbed BiCS4, are based on a 96-layer three-dimensional stacked-cell structure and triple-level cell (TLC) technology. The companies' initial implementation sees the modules built into a 32GB chip scheduled for release in the second half of the year with mass production beginning some time in 2018. Both companies claim the design will also allow for 64GB chips 'in the near future' and can be expanded still further to cover quadruple-level cell (QLC) parts which store four bits per memory cell to TLC's three.

According to Toshiba, BiCS4 represents a 40 percent capacity increase over the 64-layer BiCS3 design for the same surface area, reduces the cost per bit of storage, and boosts the amount of memory capacity which can be manufactured from each silicon wafer - the latter claim sounding a lot like the former.

The new memory technology will, in theory, lead to cheaper and larger-capacity solid-state drive (SSDs), memory cards, and flash drives, though at present neither Western Digital nor Toshiba have offered a firm timescale for consumer product launches based around the parts.


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