Nvidia Tegra 4 'Wayne' specs leak ahead of launch

December 19, 2012 // 11:18 a.m.

Tags: #arm #ces #cortex-a15 #cortex-a9 #kal-el #mwc #nvidia #soc #system-on-chip #tegra #tegra-2 #tegra-3 #wayne

Specifications for Nvidia's upcoming Tegra 4 chip, codenamed 'Wayne' in a continuation of the superhero-themed naming convention that brought us Tegra 3 'Kal-El,' have leaked ahead of an expected formal launch in January or February next year.

Designed for high-end tablets and smartphones, Tegra 4 builds on Nvidia's existing Tegra 3 chip and shares the basic design: four ARM-based processing cores are joined by a fifth low-power 'companion' core designed to keep the device ticking over when the screen is off without drawing excessive power. It's an approach adopted by others in the industry, and one approved of by ARM itself with its own 'big.LITTLE' design ethos.

As befits a next-generation part, however, Wayne is somewhat beefier than Kal-El - something Batman and Superman fans can argue about in the comments should they so desire. According to a slide leaked by sources unknown and obtained by Chip Hell, while Wayne will be limited to the same four-plus-one-core layout as Kal-El, the graphics portion will enjoy a significant boost with a 72-core GeForce graphics processor providing a claimed 6x performance increase over Tegra 3 and a 20x increase over Tegra 2.

The processing portion of the system-on-chip design is believed to be based around ARM's Cortex-A15, a next-generation replacement for the Cortex-A9 IP used in Tegra 3. Offering improved performance and some nice new features, including 48-bit memory addressing and hardware virtualisation extensions, Wayne should also boast improved performance for general-purpose compute, even if it launches at the same frequencies as its predecessor.

Other features promised by the slide include a dual-channel memory controller with support for DDR3L, LPDDR2 and LPDDR3 RAM, video hardware encode and decode at 2,650x1,440 resolution in VP8 and H.264 formats, and an eight-lane display serial interconnect (DSI) driver supporting up to 2,560x1,600 resolution displays, 1080p at 120Hz for 3D displays, or 4K resolution displays over HDMI. An imaging processor provides support for high-resolution cameras, and input-output capabilities include USB 3.0, SDIO, and SPI.

A shift to a 28nm lithographic process, combined with improvements in the Cortex-A15 architecture, will mean lower power draw compared to Tegra 3, although as yet Nvidia hasn't provided any firm figures as to actual power draw or overall performance.

With Nvidia expected to unveil the first Tegra 4 'Wayne'-based devices at either the Consumer Electronics Show (CES) in January or Mobile World Congress (MWC) in February, fans of the company's high-performance system-on-chip products shouldn't have long to wait to see if the slide's claims are accurate.
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