Intel has admitted that a design flaw in its latest Haswell microarchitecture has led to the disabling of transactional memory extensions, known as Intel TSX, in all versions of the chips.
A bug in the Haswell microarchitecture has led Intel to disable transactional memory (TSX) support in all chip editions, with no word yet on when a fixed stepping will be available.
Intel TSX was touted as a major feature of the new Haswell microarchitecture when it was unveiled in February 2012
. The system works by allowing programmers to specify memory locations which should be synchronised for transactional use; then, like a database, operations can be performed in isolation without the fear that they will become unsynchronised. For multi-threaded applications written with TSX in mind, the technology promises a considerable performance boost as unnecessary synchronisation steps normally required in threaded programming can be removed in favour of TSX.
Sadly, there's a problem: a bug has crept into the Haswell microarchitecture that means TSX doesn't work properly, and Intel has been forced to disable TSX altogether via a microcode update. According to The Tech Report
, this update applies to all Haswell-based processors and will completely lock off TSX support.
Intel has confirmed the existence of the flaw, which has been officially recorded as erratum for all existing steppings of the Haswell microarchitecture. A fix for the issue, which was discovered by a developer trying to use TSX outside Intel, is planned for future steppings - but, for now, there are no Haswell chips on the market or planned in the immediate future that will include a working implementation of TSX.
Intel has not indicated how it plans to address complaints from buyers who specifically opted for Haswell chips in order to use TSX in their applications.