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IBM and AMD create first 22nm SRAM cell

IBM and its partners create a working 22nm SRAM cell using high-NA immersion lithography

IBM 32nm SRAM cell using High-K/Metal Gate technology

Transistor technology has just taken another step towards the continuation of Moore’s law, as IBM has announced that it’s produced a working sample of an SRAM cell built on a 22nm process at its 300mm research facility in Albany, New York. The technology was developed with several partners, including AMD, Toshiba, STMicroelectronics and Freescale, as well as the College of Nanoscale Science and Engineering (CNSE), where IBM performs a lot of its semiconductor research.

IBM says that the cell’s development process involved ‘novel fabrication processes,’ including high-NA immersion lithography to print the compact patterns. The company also notes that development of the 22nm cell was helped along by technologies such as high-K metal gate stacks, extremely thin silicide, damascene copper contacts and advanced activation techniques.

The cell itself is miniscule, covering an area of just 0.1µm² and IBM says that it’s a precursor of what’s to come in future chips. The next process generation for silicon, according to IBM, has 32nm transistors, with 22nm chips following in the generation after that.

Last year, Intel showed off a 32nm SRAM cell at the Intel Developer Forum (IDF) in November, and IBM also showed off a 32nm cell smaller than 0.15µm² later on in December. An SRAM cell, in the words of IBM, is a ‘basic building block,’ which is then usually shrunk to make a denser SRAM chip. Although we’re still years away from a 22nm CPU, IBM says points out that ‘SRAM cell size is a key technology metric in the semiconductor industry, and this work demonstrates IBM and its partners' continued leadership in cutting-edge process technology.’

Vice president of science and technology at IBM Research, Dr T. C. Chen, commented that IBM is ‘working at the ultimate edge of what is possible - progressing toward advanced, next-generation semiconductor technologies.’ He also added that ‘This new development is a critical achievement in the pursuit to continually drive miniaturisation in microelectronics.’



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